1. Field of the Invention
The present invention relates to the field of fault handling. More particularly, the present invention relates to a system and method for ascertaining an origin of a fault condition through manipulation of segment and offset used to calculate an effective address.
2. Description of Art Related to the Invention
For many years, interrupt handling of an electronic system has been accomplished through the use of an interrupt vector table (IVT) generated by system Basic Input/Output System (BIOS) firmware. An IVT usually features a number of entries (e.g., 256 four-byte entries), each capable of containing an address of a routine intended to handle interrupts. At start-up, system software usually loads an identical address into each entry of the IVT. This address is directed to a default interrupt handler routine responsible for handling interrupts anticipated to occur during initialization (e.g., a hard disk interrupt, timer interrupt, non-maskable interrupt "NMI", software invoked interrupts such as trap instructions, etc.). However, this interrupt handling technique does not effectively account for an unexpected (spurious) interrupt (referred to as a "fault condition") caused by either hardware or software.
Currently, upon experiencing a fault condition, the default interrupt handler routine is accessed. Unfortunately, the default interrupt handler routine is only able to determine whether or not the interrupt is associated with a predetermined set of external interrupts (e.g., a hard disk interrupt, a timer error, a NMI, etc.) supported by one or more programmable interrupt controllers (PICs) such as INTEL.RTM.8259 controllers. Such determination is accomplished by checking the state of various logic circuitry (e.g., latches, etc.) associated with the PIC(s).
If the fault condition is based on any of the predetermined set of interrupts, a number assigned to that interrupt is loaded into a status register. Thus, the content of the status register indicates the cause of the fault condition. Otherwise, a null value is loaded into the status register which offers no indication of the cause of the fault condition. As a result, the origin of a fault condition is rarely ascertained since only fifteen types of interrupts can be detected by the current IVT.
Of course, it is possible to develop an interrupt handling mechanism in which each entry of the IV is loaded with an address of a unique interrupt handling routine. This may be a possible solution if strict memory size constraints did not apply. However, since BIOS only has a limited amount of available code space and supports IVT during and after initialization, system performance would be unnecessarily sacrificed to substitute run-time code in BIOS for fault handling code which is rarely used.